1. Field of the Invention
The present invention relates to a chip mounting plate construction of lead frames for semiconductor packages, and more particularly to an improvement in such a construction for providing a chip mounting plate having a unique shape with a reduced volume or area as compared to the well-known quadrilateral construction, thereby capable of reducing the bonding area of the chip mounting plate, to which a semiconductor chip is bonded, to minimize a strain generated at the chip mounting plate due to a thermal expansion thereof.
2. Description of the Prior Art
Generally, lead frames for semiconductor packages are made of metal. Such metal lead frames have a chip mounting plate on which a semiconductor chip made of a material different from the lead frame is mounted, and a plurality of leads arranged along the edge of the chip mounting plate. The leads are connected with chip pads of the semiconductor chip mounted on the chip mounting plate by means of a wire bonding so that transmission of electrical signal can be achieved between the semiconductor chip and each lead. After completing the wire bonding work, the lead frame with the semiconductor chip mounted on the chip mounting plate is molded into a single semiconductor package using a synthetic resin compound.
A chip mounting plate construction of conventional semiconductor package lead frames is shown in FIG. 1. Referring to FIG. 1, a chip mounting plate 3 is shown as having a sufficiently larger area than that of a semiconductor chip C mounted thereon so that it can sufficiently accommodate the entire area of the semiconductor chip C. Tee bars 3a are also shown. As a result, a large bonded area is formed between the chip mounting plate 3 and the semiconductor chip C bonded to the chip mounting plate 3 by means of an epoxy material 36. The chip mounting plate of lead frame may be subject to a high temperature working condition during the fabrication of a semiconductor package. Since the chip mounting plate 3 is made of a material different from that of the semiconductor chip C, it is thermally strained in a higher degree than that of the semiconductor chip C when the lead frame is subjected to a high temperature working condition due to a difference in thermal expansion coefficient between the chip mounting plate and the semiconductor chip. Since the bonded area between the chip mounting plate 3 and the semiconductor chip C is large, the thermal strain of the chip mounting plate 3 becomes higher. As a result, an interface lamination occurs at the bonded area of the semiconductor chip C mounted on the chip mounting plate 3. In particular, the severe strain of the chip mounting plate 3 results in a degraded operation of the semiconductor package finally fabricated and a degradation in product quality.